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Welcome to the Chair for Software Modeling, Verification & Synthesis!

The Software Modeling, Verification and Synthesis Group, headed by Dr. Falak Sher, is one of the research units in the Department of Computer Science. Our research and teaching program is concerned with the study, development and application of formal methods to software design in a broader sense. Our activities concentrate on modeling and verifying trustworthiness aspects (such as safety, reliability, performance and survivability) of software systems by applying mathematical theories and methods.